journal6 ›› 2010, Vol. 31 ›› Issue (2): 64-68.

• 物理与电子 • 上一篇    下一篇

电荷泵锁相环电路设计及其性能

  

  1. (1.东南大学集成电路学院无锡分校,江苏 无锡214135;2.东南大学国家ASIC工程技术研究中心,江苏 南京210096)
  • 出版日期:2010-03-25 发布日期:2012-04-18
  • 作者简介:李冰(1968- ),男,东南大学副教授,博士,主要从事可重构信息集成电路与SOC嵌入式系统研究.
  • 基金资助:

    国家高技术研究发展计划(863计划)研究项目(2007AA01Z280)

Charge Pump PLL Circuit Design and Performance

  1. (1.Integrated Circuits Colloge Southeast University,,Wuxi Branch,Wuxi 214135,Jiangsu China;2.National ASIC System Engineering Center,Nanjing 210096,China)
  • Online:2010-03-25 Published:2012-04-18

摘要:锁相技术广泛应用于通信中的各个领域.在分析电荷泵锁相环电路非理想效应的基础上,对鉴频鉴相器(PFD)、电荷泵(CP)、环路滤波器(LPF)、压控振荡器(VCO)、分频器模块(FDM)进行了优化设计.在进行系统级设计时,建立了相应的行为模型,通过 Simulink 仿真验证,整个系统基于CMOS 工艺实现,符合设计要求,性能优良.

关键词: 频率合成, 电荷泵锁相环, 性能改进, 行为模型

Abstract: The technology of PLL is widely used in various domain of communication.Charge Pump PLL consists of PFD,CP,LPF,VCO and frequency divider module.Grounded on the non-ideal effect of Charge Pump PLL,an optimized design has been carried out.A corresponding acting model has been created,in the process of system design,simulated and proved though simulink.Accomplished by CMOS Process and the entire system  meets the design demand and works well.

Key words: frequency synthesis, charge pump PLL, optimized design, acting model

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